W.Philips, “Energy costs of transporting switch control bits for a segmented bus

Keywords—System-on-Chip, deep sub-micron technology, bus interconnection, segmented bus, power-aware optimization. Abstract — When designing interconnection circuitry for Systems-on-Chip in deep sub-micron technology, it becomes clear [15] that the energy consumed by communication within a processing tile is gradually taking predominance over the energy consumed in the circuitry of the tile itself. Long wires are prevalent in most bus systems; therefore the segmented bus, which continuously minimizes the length of active wire, and therefore the capacitance that has to be driven, becomes attractive [20]. The segments of the bus are switched in and out of place by multiple switches, which themselves need to be controlled from the instruction subsystem of an instruction set processor. Whatever energy is gained in the data plane could well be lost in the control plane, unless measures are taken to minimize this. The control energy for a segmented bus has two main components: there is the energy required to distribute the control bits over the tile, and the energy required to fetch the control bits fro